ADC10040QCIMT

10-Bit, 40 MSPS, 3V, 55.5 mW, A/D Converter (analog-to-digital converter), TSSOP, monolithic CMOS

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Price:: US $1.50~2.80 / piece [Get Latest Price]

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PartNumber:: ADC10040QCIMT

Brand:: National Semiconductor - NS | Pack: TSSOP | D/C: 10+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-10-13

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Part Number:ADC10040QCIMT
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YL-G709

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Product Summary

The ADC10040QCIMT is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 10-bit digital words at 40 Megasamples per second (MSPS). The ADC10040QCIMT converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to provide a complete conversion solution, and to minimize power consumption, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 400 MHz. Operating on a single 3.0V power supply, the ADC10040QCIMT consumes just 55.5 mW at 40 MSPS, including the reference current. The Standby feature reduces power consumption to just 13.5 mW.

Parametrics

ADC10040QCIMT absolute maximum ratings: (1)Resolution: 10 Bits; (2)Conversion Rate: 40 MSPS; (3)Full Power Bandwidth: 400 MHz; (4)DNL: ±0.3 LSB (typ); (5)SNR (fIN = 11 MHz): 59.6 dB (typ); (6)SFDR (fIN = 11 MHz): -80 dB (typ); (7)Power Consumption, 40 MHz: 55.5 mW.

Features

ADC10040QCIMT features: (1)Single +3.0V operation; (2)Selectable 2.0 VP-P, 1.5 VP-P, or 1.0 VP-P full-scale input swing; (3)400 MHz -3 dB input bandwidth; (4)Low power consumption; (5)Standby mode; (6)On-chip reference and sample-and-hold amplifier; (7)Offset binary or two’s complement data format; (8)Separate adjustable output driver supply to accommodate 2.5V and 3.3V logic families; (9)AEC-Q100 Grade 3 Qualified; (10)28-pin TSSOP package.